MIPS ISA

The Opcode enum organizes MIPS instructions into several functional categories, each serving a specific role in the instruction set:

#![allow(unused)]
fn main() {
pub enum Opcode {
    // ALU
    ADD = 0,         // ADDSUB
    SUB = 1,         // ADDSUB
    MUL = 2,         // MUL
    MULT = 3,        // MUL
    MULTU = 4,       // MUL
    DIV = 5,         // DIVREM
    DIVU = 6,        // DIVREM
    MOD = 7,         // DIVREM
    MODU = 8,        // DIVREM
    SLL = 9,         // SLL
    SRL = 10,        // SR
    SRA = 11,        // SR
    ROR = 12,        // SR
    SLT = 13,        // LT
    SLTU = 14,       // LT
    AND = 15,        // BITWISE
    OR = 16,         // BITWISE
    XOR = 17,        // BITWISE
    NOR = 18,        // BITWISE
    CLZ = 19,        // CLO_CLZ
    CLO = 20,        // CLO_CLZ
    // Control FLow
    BEQ = 21,        // BRANCH
    BGEZ = 22,       // BRANCH
    BGTZ = 23,       // BRANCH
    BLEZ = 24,       // BRANCH
    BLTZ = 25,       // BRANCH
    BNE = 26,        // BRANCH
    Jump = 27,       // JUMP
    Jumpi = 28,      // JUMP
    JumpDirect = 29, // JUMP
    SYSCALL = 30,    // SYSCALL
    // Memory Op
    LB = 31,         // LOAD
    LBU = 32,        // LOAD
    LH = 33,         // LOAD
    LHU = 34,        // LOAD
    LW = 35,         // LOAD
    LWL = 36,        // LOAD
    LWR = 37,        // LOAD
    LL = 38,         // LOAD
    SB = 39,         // STORE
    SH = 40,         // STORE
    SW = 41,         // STORE
    SWL = 42,        // STORE
    SWR = 43,        // STORE
    SC = 44,         // STORE
    // Misc
    INS = 45,        // INS
    MADDU = 46,      // MADDSUB
    MSUBU = 47,      // MADDSUB
    MADD = 48,       // MADDSUB
    MSUB = 49,       // MADDSUB
    MEQ = 50,        // MOVCOND
    MNE = 51,        // MOVCOND
    WSBH = 52,       // WSBH
    EXT = 53,        // EXT
    TEQ = 54,        // TEQ
    SEXT = 55,       // SEXT

    // Syscall
    UNIMPL = 0xff,
}
}

All MIPS instructions can be divided into the following taxonomies:

ALU Operators
This category includes the fundamental arithmetic logical operations and count operations. It covers addition (ADD) and subtraction (SUB), several multiplication, division and remainder variants (MULT, MULTU, MUL, DIV, DIVU, MOD, MODU), as well as bit shifting and rotation operations (SLL, SRL, SRA, ROR), comparison operations like set less than (SLT, SLTU) a range of bitwise logical operations (AND, OR, XOR, NOR) and count operations like CLZ counts the number of leading zeros, while CLO counts the number of leading ones. These operations are useful in bit-level data analysis.

Memory Operations
This category is dedicated to moving data between memory and registers. It contains a comprehensive set of load instructions, such as LH (load halfword), LWL (load word left), LW (load word), LB (load byte), LBU (load byte unsigned), LHU (load halfword unsigned), LWR (load word right), and LL (load linked), as well as corresponding store instructions like SB (store byte), SH (store halfword), SWL (store word left), SW (store word), SWR (store word right), and SC (store conditional). These operations ensure that data is correctly and efficiently read from or written to memory.

Branching Instructions
Instructions BEQ (branch if equal), BGEZ (branch if greater than or equal to zero), BGTZ (branch if greater than zero), BLEZ (branch if less than or equal to zero), BLTZ (branch if less than zero), and BNE (branch if not equal) are used to change the flow of execution based on comparisons. These instructions are vital for implementing loops, conditionals, and other control structures.

Jump Instructions
Jump-related instructions, including Jump, Jumpi, and JumpDirect, are responsible for altering the execution flow by redirecting it to different parts of the program. They are used for implementing function calls, loops, and other control structures that require non-sequential execution, ensuring that the program can navigate its code dynamically.

Syscall Instructions
SYSCALL triggers a system call, allowing the program to request services from the zkvm operating system. The service can be a precompile computation, such as do sha extend operation by SHA_EXTEND precompile. It can also be an input/output operation such as SYSHINTREAD and WRITE, or a Linux system call (see Linux ABI).

Misc Instructions
This category includes other instructions. TEQ is typically used to test equality conditions between registers. MADDU/MSUBU is used for multiply accumulation. SEB/SEH (executor opcode SEXT) sign-extend a byte or halfword. EXT/INS extract and insert bit fields. WSBH swaps the bytes within each halfword. MOVZ/MOVN (executor opcodes MEQ/MNE) are conditional moves.

Supported instructions

The support instructions are as follows:

Supported syscalls

Linux syscalls not listed above but handled as no-ops (open, close, munmap, rt_sigaction, uname, futex_time64, prctl and others) are listed in Linux ABI. All Linux syscalls are proved by one chip, SysLinux; in the proof they are grouped under the code SYS_LINUX = 4000, which is not itself a syscall. Any other syscall number is rejected by the executor (UnsupportedSyscall).